Using Samsung Foundry's SF4X 4nm advanced process, the latest BlueLynx PHY supports both standard 2D and advanced 2.5D packages and enables system designers ... Read

YorChip, Inc. announces development of a Universal PHY enabling customers to develop Open Chiplets and ASIC solutions using a single die-to-die PHY. Read

PQShield has joined the Cyber Research Consortium (CRC) in Japan to participate in its program with the Japanese government’s New Energy and Industrial ... Read

Under this agreement, Ambarella will utilize Qualitas C/D-PHY IP, implemented on the 5nm process, to apply it to its next-generation AI engine, CVflow®-based ... Read

This new IP core implements the Module-Lattice Key Encapsulation Mechanism (ML-KEM) as specified in the NIST FIPS 203 standard, and is CAST’s first ... Read

The next-generation UCIe physical layer IP, based on TSMC's N4 process, is expected to finalize its design later this year, supporting data transmission ... Read